NVIDIA® BlueField® DPUs and NVIDIA® ConnectX® SuperNICs provide a set of production-ready congestion control algorithms that execute natively on the device’s DPA-based congestion control engine—the same underlying infrastructure used by the programmable PCC framework. Spanning reactive and proactive congestion-avoidance approaches, these algorithms address a broad range of RoCE fabric conditions, using both explicit congestion notifications and delay-based detection to make real-time, per-flow rate decisions on the device.
NVIDIA provides two deployable native CC algorithms:
-
DCQCN algorithm (legacy interoperability) – a closed-loop, ECN-based algorithm that coordinates Congestion Points, Notification Points, and Reaction Points.
-
ZTR-RTT CC algorithm (GA) – augments the DCQCN feedback model with hardware-timestamped round-trip time (RTT) measurements, enabling Zero Touch RoCE deployments without specialized switch configuration.
Native and user-programmed CC are separate, mutually exclusive execution paths. The USER_PROGRAMMABLE_CC firmware setting determines which path is active. Within the selected path, the PPCC (Port Programmable Congestion Control) register provides per-port control for enabling algorithms and managing their parameters and counters.
The native algorithms expose tunable parameters that allow deployments to adjust congestion sensitivity, rate-recovery behavior, and latency objectives.
The same infrastructure underpins NVIDIA DOCA Programmable Congestion Control (PCC), enabling users to design and deploy custom CC algorithms tailored to their fabric and traffic characteristics.
Last updated: